1. Technical Field
The present invention relates generally to a mobile communication system and, more particularly, to a mobile communication system having a baseband analog processor with DC offset compensation circuitry.
2. Description of Related Art
Code division multiple access (CDMA) is based on technology originally developed by the Allies during World War II to resist enemy radio jamming. It has been significantly refined during the intervening decades, and is used today in digital cellular services and personal communication services (PCS), as well as a variety military applications.
The earliest radio transmissions were unintentionally spread across a broad frequency spectrum, much like CDMA. However, the proliferation of uses for radio, coupled with the inherent inability to discern the difference between one radio signal and another, led to change. This change was the division of the radio spectrum into specific bands and frequencies, or channels, to prevent one transmission from interfering with another. This change was made possible by improvements in radio filter technology.
With CDMA technology, the signal is spread over a broad frequency of spectrum. In particular, the CDMA process involves dividing a digitized voice transmission into small packets of encoded data which are then transmitted along with other transmissions across a broad band of spectrum. Each transmission is spread in bandwidth by its own encoding sequence so that no transmission has the same code. Although all transmissions are sent out simultaneously, the unique code allows the receiver to separate one transmission from all the others.
Referring to FIG. 1, a block diagram illustrates a conventional mobile communication system which may be implemented, e.g., in a CDMA mobile phone. The conventional system comprises an input circuit 100, a gain control circuit 200, a baseband analog processor 300, a digital mobile station modem (MSM) 400, and a coder-decoder (CODEC) 500, all of which are serially connected between an antenna 10 and a speaker 20 in the order as illustrated.
The conventional mobile communication system of FIG. 1 operates as follows. A very weak signal RFA received from a base station via the antenna 10 is down-converted into an intermediate frequency (denoted by IFA1) band by the input circuit 100. The IFA1 signal is provided to the gain control circuit 200, wherein it is amplified to produce an IFA2 signal. This IFA2 signal is then received by the baseband analog processor 300, wherein it is down-converted to generate a first baseband analog signal which is then converted to a first baseband digital signal BBD1. The BBD1 signal is input to the MSM 400, wherein it undergoes CDMA demodulation. The CDMAdemodulated signal is output as a second baseband digital signal BBD2, which is then processed by the CODEC 500 to extract the voice data. The voice data is then output via the speaker 20.
Referring now to FIG. 2, a detailed block diagram illustrates a conventional baseband analog processor 300 of the system illustrated in FIG. 1. As shown, the conventional baseband analog processor 300 comprises a down converter 310, a low-pass filter 320, an analog-to-digital converter (ADC) 330, and an offset compensation circuit 340. The down converter 310 down-converts the IFA2 signal to the baseband analog signal BBA1. The baseband analog signal BBA1 is then filtered by the low-pass filter 320 to eliminate noise. The low-pass filter 320 is typically a high order low-pass filter. Typically, the filtered baseband analog signal BBA2 contains a DC offset voltage AOV, which is one of the corrupting influences present in the analog signal. The control of the DC offset voltage AOV at the input of the ADC 330 is considerably affected by the receiving signal path and the MSM digital processing.
Accordingly, an offset compensation signal OCAS1 is provided to control the DC offset voltage AOV. In particular, the MSM 400 senses the DC offset of the digital baseband data (BBDI) and produces a pulse density modulated (PDM) signal or a pulse width modulated (PWM) signal as the offset compensation signal OCAS1 to compensate the DC offset voltage AOV. The offset compensation signal OCAS1 is settled between 50% and 100% of an ADC full scale. However, since the baseband analog processor 300 is a monolithic integrated circuit (MIC), the DC offset voltage AOV is typically greater than the full scale of the ADC 330. Thus, the offset voltage AOV may not be fully controlled by the offset compensation signal OCAS1.
A conventional solution to the foregoing problem is the use of the offset compensation circuit 340 to compensate the offset voltage AOV. The offset compensation circuit 340 comprises a comparator 341, a counter 342, a latch 343, and a digital-to-analog converter (DAC) 344. When supplied with power, the baseband analog processor 300 generates a "power on" signal POW, which causes the comparator 341 to generate a detection signal COM by comparing the DC offset voltage (AOV) of the filtered baseband analog signal BBA2 and a reference voltage VREF. The counter 342 counts the detection signal COM in synchronism with a clock signal CLK (which is an internal clock signal of the baseband analog processor 300). The counted compensation signal OCDS2 is latched by the latch 343. The latch 343 then sends the OCDS2 signal to the DAC in response to the detection signal COM. The DAC 344 converts the counted compensation signal OCDS2 into a second offset compensation signal OCAS2, which is then received by the filter 320. In this manner, during the "power on" period of, e.g., the CDMA mobile phone, the offset compensation circuit 340 will generate the second offset compensation signal OCAS2 to preset the DC offset voltage AOV, so that the offset voltage is settled below the full scale of the ADC 330.
After the DC offset voltage AOV is preset as described above, the MSM 400 will generate the offset compensation signal OCAS1 to compensate the DC offset voltage AOV of the filtered baseband analog signal BBA2 when the first baseband digital signal BBDI is received by the MSM 400 from the ADC 330.
One disadvantage associated with the conventional baseband analog processor 300 is that the "power on" preset offset voltage of the baseband analog processor 300 is fixed at a constant value. Therefore, when a sudden variation of ambient environment, such as temperature and/or humidity, is encountered during operation of the system, the DC offset voltage AOV may exceed the compensable range, causing the compensation of the offset voltage AOV to be restricted. This may result in an undesired erroneous voice signal. Accordingly, there is a need in the art for a baseband analog processor which provides improved DC offset compensation to overcome the above described disadvantages.